<?xml version="1.0"?><rss version="2.0">
<channel>
  <title>Alan&#039;s Ramblings - openbench logic sniffer tag</title>
  <link>http://bleaklow.com:80/tags/openbench logic sniffer/</link>
  <description>My opinions may be incorrect, but they are my own</description>
  <language>en</language>
  <copyright>Alan Burlison</copyright>
  <lastBuildDate>Wed, 29 Feb 2012 20:50:00 GMT</lastBuildDate>
  <generator>Pebble (http://pebble.sourceforge.net)</generator>
  <docs>http://backend.userland.com/rss</docs>
  <image>
    <url>http://bleaklow.com/images/misc/logo.gif</url>
    <title>Alan&#039;s Ramblings</title>
    <link>http://bleaklow.com:80/</link>
  </image>
  <item>
    <title>Openbench Logic Sniffer comes of age</title>
    <link>http://bleaklow.com:80/2011/02/15/openbench_logic_sniffer_comes_of_age.html</link>
    <description>
          &lt;img src=&#034;/images/2011/ols.jpg&#034; alt=&#034;Open Logic Sniffer&#034;/&gt;
&lt;p&gt;
A while back I bought a &lt;a href=&#034;http://dangerousprototypes.com/2010/02/25/prototype-open-logic-sniffer-logic-analyzer-2/&#034;&gt;Openbench Logic Sniffer&lt;/a&gt; from &lt;a href=&#034;http://dangerousprototypes.com&#034;&gt;Dangerous Prototypes&lt;/a&gt;.  Whilst it kind-of worked it was most definitely alpha and really not much practical use - no big deal considering the low price.  However everything is field-upgradable so I put it to one side and more or less forgot about it.  Over the last few days I&#039;ve revisited the project and upgraded everything, and it&#039;s turning into a fantastic little tool.  The first thing of note is that the FPGA core has been &lt;a href=&#034;http://dangerousprototypes.com/forum/viewtopic.php?f=23&amp;t=1711&#034;&gt;completely rewritten&lt;/a&gt; by &lt;a href=&#034;http://www.www.mygizmos.org/ols/fpga.html&#034;&gt;doggsbody&lt;/a&gt;, who almost unbelievably has managed to get most of the functionality of a &lt;a href=&#034;http://www.home.agilent.com/agilent/product.jspx?id=1000001228:epsg:pro&amp;pid=1000001228:epsg:pro&#034;&gt;HP16550A&lt;/a&gt; logic analyser into the FPGA, although the user interface hasn&#039;t yet been extended to allow access to all the new goodness.
&lt;/p&gt;
&lt;p&gt;
The original flakiness between the FPGA and the PIC processor used to glue everything together seems to have been solved as well.  The real icing on the cake is there&#039;s also a new client to drive it all - the old &lt;a href=&#034;http://www.sump.org/projects/analyzer/client/&#034;&gt;SUMP&lt;/a&gt; client was really getting a bit long in the tooth, and there&#039;s a new and much &lt;a href=&#034;http://dangerousprototypes.com/forum/viewtopic.php?f=57&amp;t=1198&#034;&gt;superior version&lt;/a&gt; that Jawi has produced.  Unfortunately although the client is written in Java, it didn&#039;t work Solaris as it didn&#039;t include the Solaris version of the &lt;a href=&#034;http://users.frii.com/jarvi/rxtx/&#034;&gt;RXTX&lt;/a&gt; JNI library.  Jawi very kindly helped me get it all working, and even better he&#039;s integrated Solaris support into the next release as well, so it will just work out of the box.  There&#039;s still more work to be done, for example, from what I can gather the 200MHz sampling mode still doesn&#039;t work properly, but having said that the progress since I last took a serious look a the project is very impressive.  
&lt;p&gt;
The last thing of note is there&#039;s now a &lt;a href=&#034;http://www.seeedstudio.com/depot/logic-sniffer-16bit-input-buffer-wing-p-721.html?cPath=61_68&#034;&gt;buffer wing&lt;/a&gt; available that allows you to use all of the available 32 channels with 5V inputs - I&#039;m very tempted to get one :-)
&lt;/p&gt;</description>
      <category>Tech</category>
    <comments>http://bleaklow.com:80/2011/02/15/openbench_logic_sniffer_comes_of_age.html#comments</comments>
    <guid isPermaLink="true">http://bleaklow.com:80/2011/02/15/openbench_logic_sniffer_comes_of_age.html</guid>
    <pubDate>Tue, 15 Feb 2011 22:11:00 GMT</pubDate>
  </item>
  </channel>
</rss>

